“MCU_SPI2…” signals are the same nets/signals that interfaces with the on-board and satellite (via JIO-ADIS) ADIS chip options. RC1 and RC2 are not brought out on the GPIO header. RC1 and RC2 are as defined in the datasheet for the DSPIC MCU. Chip select signals for the ADIS chip options are separate from the RC1/2 signals here, and are MCU_SPI2B_!CS (on-board) and MCU_SPI2_!CS (satellite), connected to the DSPIC signals/nets/pins RA7 and RA6 respectively. Those connections are evident in the code/headers etc for the legacy firmware. VDD3.3 is the main power rail for the DSPIC and etc that is controlled by the JP7 jumper position and thus optionally by the communications module pin control.
